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Home » Electronic Components » Chip Capacitors
 Chip Capacitors
 
Designation
Class
Temperature Range
Temp-Cap Change



The T.C curve of each material. (for reference)


Technology

Multi-layer Ceramic Capacitor constructed by depositing alternative layers of ceramic dielectric materials and internal metallic electrodes, by advanced ceramic manufacturing technology and co-firing into an indestructible homogeneous body, then completed with application of mta and terminations which are fired on to assure that permanent connection of individual internal electrodes are in parallel. The terminations also can be nickel-plated and then solder plated to give the chip capacitors nickel-barrier terminations which have much better leaching resistance during soldering.
Reliable performances are built-in through exact formulation of dielectric powders, preperation of conductive paste, advanced automatic manufacturing and strict quality control to assure excellent control in dielectric thickness, electrode integrity and electrode-to-termination continuity.

NPO

Characterizes
Test conditions
Requirement


X7R/Y5V/Z5U

X7R
Y5V
Z5U
Operation temp. Range  
-550C ~ +1250C
-250C ~ +850C
+100C ~ +850C
Temp. Coefficient (TC) NPO/X7R: With respect to 200C within operation temp. range

Y5V/Z5U: With respect to 250C within operation temp. Range
±15%
   
Capacitance tol. NPO/X7R: With respect to 200C
Y5V/Z5U: With respect to 250C

C<=1000pF,IVrms / IMHz
C>1000pF,IVrms / IMHz
In accordance with spec.
Dissipation Factor
(tan §)
50V
tan§ <=2.5%
25V
tan§<=3.5%
16V
tan§<=5%
50V
tan§ <= 5%
25V
tan§<= 7%
16V
tan§<= 9%
50V
tan§ <= 4%
25V
tan§<= 6%
Insulation
Resistance (IR)
At Vr (rated voltage)
for 1 minute
Rins >100G
or Rins x C
>= 1000S
Whichever is less
Rins >10G
or Rins x C
>= 100S
Whichever is less
Rins >10G
or Rins x C
>= 1000S
Whichever is less
Dielectric withstanding voltage At 2.5Vr (rated voltage)
for 1 minute
No breakdown